1. Field of the Invention
This invention relates generally to semiconductor wafer manufacturing, and, more particularly, to a method of precisely sensing and controlling temperature of a structure used in an integrated circuit during testing.
2. Discussion of the Related Art
The rapid growth of technological requirements and the worldwide acceptance of sophisticated electronic devices have created an unprecedented demand for large-scale, complex, integrated circuits. Meeting these demands has required technological advances in materials and processing equipment and a significant increase in the number of individuals involved in integrated circuit design and testing. In addition, there has been an increased emphasis on effectively utilizing sophisticated test instruments to aid in the analysis of the manufacturing parameters so that the design and manufacturing process can be improved in order to increase the performance of the final semiconductor product.
In order to meet the increasing demand, there has been an ever increasing requirement to increase the density of devices manufacturable on a semiconductor substrate. The number of devices manufactured on a chip exceeded the generally accepted definition of VLSI (very large scale integration) of more than 100,000 devices per chip in the mid-1970s. By 1986, this number had grown to over 1 million devices per chip. As is well known, today the number of devices per chip is well over 1 million devices per chip and is growing rapidly. Generally, the increase in the number of devices per chip has been achieved by reducing the minimum feature size, enlarging the chip area, and improving the packing efficiency of the devices. The main questions facing chip designers concern how long the growth in devices per chip can continue, how can the performance potential of the ULSI (ultra large scale integrated) circuits be best utilized, and most importantly, what will be the factors limiting the future growth. Currently, interconnection- and packaging-related issues are among the main factors that determine the maximum number of circuits that can be integrated on a chip as well as the chip performance. Interconnections and packaging will gain even more importance as feature sizes of transistors are reduced and chip dimensions are enlarged. Therefore, understanding the on-chip and chip-to-chip interconnection issues will be one of the keys to achieving the full potential of future ULSI systems.
Conceptually, digital integrated circuits contain two basic components: transistors and interconnections. At low integration levels (SSI and MSI), circuit speed, packing density, and yield are determined by transistors, but as more and more devices are integrated on a single die, interconnections gain importance. Interconnections play an important role in determining the speed, area, reliability, and yield of VLSI circuits.
Aluminum is the preferred metal for VLSI interconnections because of its low resistivity, good adherence to silicon and silicon dioxide layers, bondability, patternability, and ease of deposition. In addition, aluminum can be easily purified and it is a readily available and low-cost material. In spite of its positive qualities, aluminum interconnections introduce many reliability problems such as electromigration and contact failures.
Electromigration is one of the major interconnection failure mechanisms in VLSI integrated circuits. It is caused by the transport of the metal atoms when they get bombarded with electrons. As they collide with the oncoming electrons, the metal atoms migrate, primarily via grain boundary diffusion, generating electrical opens and shorts that cause the circuit to fail.
Because of the importance of interconnections to the VLSI process as well as the ULSI process it is becoming critical that methods are available to study the various factors affecting reliability of integrated circuits. Temperature is a major factor in many phenomena associated with semiconductors and integrated circuits and it is critical that methods are available to study the effects of temperature on these phenomena. For example, electromigration-induced mass transport phenomena increase linearly with current density and exponentially with temperature. Therefore, because electromigration is a key factor causing failure in semiconductor integrated circuits it is important to be able to characterize precisely the mode of failure and determine a MTTF (mean time to failure) of a device. Because of the criticality of the determination, it is also necessary that the testing be done on an accelerated basis and in some instances be done in-situ. In addition, the expected lifetime of the technology also requires that accelerated lifetime tests be done.
Using the phenomena of electromigration as an example of a phenomena that needs to be characterized by the methods of the present invention, the present method of accelerated testing of the effects of electromigration is to place a sample representative of the structure to be characterized in a test structure. Current is caused to flow through the sample while the temperature of the test structure is raised to cause failure on an accelerated basis. However, a major problem with this method of testing is that as can be appreciated by one skilled in the art, one of the effects of electromigration is that when metal atoms are dislocated a void is formed causing the effective cross section to decrease. Because the current density will increase in the remaining portion of the interconnect the temperature will rise causing a "hot spot" in the interconnect. In addition, as temperature increases the resistance increases, an increase in resistance causes the temperature to increase causing an upward spiral of temperature-resistance-temperature increases until rapid failure. If this rise in temperature/resistance/temperature, etc., is not detected and accounted for the test results will be inaccurate. Another aspect of failure that must be accounted for is that other alloying elements such as copper and silicon may be affected by the increase in temperature and cause failure. This affect must also be accounted for or convoluted test results may be obtained.
It is also important that a method be available to test in-situ various semiconductor devices. In this case, it would be desirable to be able to fabricate either a heat source or a temperature sensor or both adjacent to the device to be tested during the actual fabrication of the device. In this way, test results and reliability behavior may be more accurately extrapolated to the actual conditions that the device will be subjected to during its intended lifetime.
Accordingly, what is needed for precise reliability testing and in-situ dynamic materials characterization experiments is to have a method for local temperature control and sensing at the wafer level as well as at a test structure level.